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<li class="navelem"><a class="el" href="dir_6d2d5b60bd20db849a9486835a2715aa.html">Libraries</a></li><li class="navelem"><a class="el" href="dir_5ec8cccc32fa528457f3b4ed28e1a2cf.html">WB32L003_StdPeriph_Driver</a></li><li class="navelem"><a class="el" href="dir_cb9a941ec225bfb9bad4e8246158e282.html">inc</a></li>  </ul>
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<p>This file contains all the functions prototypes for the RCC firmware library.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;wb32l003.h&quot;</code><br />
</div>
<p><a href="wb32l003__rcc_8h_source.html">Go to the source code of this file.</a></p>
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_r_c_c___clocks_type_def.html">RCC_ClocksTypeDef</a></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gadf7eb5d3664cf415605b57b0e29da1df"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c___h_s_i___value.html#gadf7eb5d3664cf415605b57b0e29da1df">HSI_VALUE_24M</a>&#160;&#160;&#160;((uint32_t)24000000)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSE_DEFAULT</b>&#160;&#160;&#160;((uint32_t)0x03)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSE_DEFAULT</b>&#160;&#160;&#160;((uint32_t)0x03)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLKSource_HSI</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; RCC_SYSCLKSEL_CLKSW_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLKSource_HSE</b>&#160;&#160;&#160;((uint32_t)0x02 &lt;&lt; RCC_SYSCLKSEL_CLKSW_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLKSource_LSI</b>&#160;&#160;&#160;((uint32_t)0x04 &lt;&lt; RCC_SYSCLKSEL_CLKSW_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SYSCLKSource_LSE</b>&#160;&#160;&#160;((uint32_t)0x08 &lt;&lt; RCC_SYSCLKSEL_CLKSW_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBCLKDiv1</b>&#160;&#160;&#160;((uint32_t)0x00)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBCLKDiv2</b>&#160;&#160;&#160;((uint32_t)0x01)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBCLKDiv1</b>&#160;&#160;&#160;((uint32_t)0x00)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBCLKDiv2</b>&#160;&#160;&#160;((uint32_t)0x01)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSI</b>&#160;&#160;&#160;((uint32_t)0x00 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSE</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_LSI</b>&#160;&#160;&#160;((uint32_t)0x02 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_LSE</b>&#160;&#160;&#160;((uint32_t)0x03 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_SYSCLK</b>&#160;&#160;&#160;((uint32_t)0x04 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HCLK</b>&#160;&#160;&#160;((uint32_t)0x05 &lt;&lt; RCC_MCOCR_MCOSEL_Pos)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOHCLkDiv1</b>&#160;&#160;&#160;((uint32_t)0x00)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOHCLkDiv2</b>&#160;&#160;&#160;((uint32_t)0x01)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_GPIOA</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_GPIOB</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 1)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_GPIOC</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 2)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_GPIOD</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 3)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_CRC</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_FLASH</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_AHBPeriph_ALL</b>&#160;&#160;&#160;((uint32_t)0x0000011F)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_UART1</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_UART2</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 1)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_I2C</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 2)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_LPUART</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 3)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_SPI</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_LPTIM</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 5)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_BASETIM</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 6)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_SYSCON</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 7)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_PCA</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_OWIRE</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 9)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_TIM1</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 10)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_TIM2</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 11)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_WWDG</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 12)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_ADC</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 13)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_AWK</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 14)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_RTC</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 15)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_CLKTRIM</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 16)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_IWDG</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 17)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_LVDVC</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 18)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_BEEP</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 19)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_DBG</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 20)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_APBPeriph_ALL</b>&#160;&#160;&#160;((uint32_t)0x001FFFFF)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_MCURST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_CPURST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 1)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_WWDGRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 2)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_IWDGRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 3)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_LVDRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_PORRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 5)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_LOCKUPRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 6)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_PADRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 7)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RSTFLAG_SFTRST</b>&#160;&#160;&#160;((uint32_t)0x01 &lt;&lt; 8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI24M_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000A0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI22M_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000A2)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI16M_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000A4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI8M_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000A6)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI4M_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000A8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI24M_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x18000090)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI22M_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x18000092)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI16M_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x18000094)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI8M_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x18000096)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSI4M_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x18000098)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITRIM_24M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI24M_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITRIM_22M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI22M_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITRIM_16M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI16M_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITRIM_8M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI8M_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITRIM_4M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI4M_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITC_24M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI24M_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITC_22M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI22M_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITC_16M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI16M_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITC_8M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI8M_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSITC_4M</b>&#160;&#160;&#160;(*(uint16_t *)(HSI4M_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_HSICALIBRATION_DEFAULT</b>&#160;&#160;&#160;((uint32_t)0x00000312)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSI38K_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000B4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSI32K_TRIM_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000B0)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSI38K_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000BC)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSI32K_TC_ADDR</b>&#160;&#160;&#160;((uint32_t)0x180000B8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSITRIM_38K</b>&#160;&#160;&#160;(*(uint16_t *)(LSI38K_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSITRIM_32K</b>&#160;&#160;&#160;(*(uint16_t *)(LSI32K_TRIM_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSITC_38K</b>&#160;&#160;&#160;(*(uint16_t *)(LSI38K_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSITC_32K</b>&#160;&#160;&#160;(*(uint16_t *)(LSI32K_TC_ADDR))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LSICALIBRATION_DEFAULT</b>&#160;&#160;&#160;0x0000007FU</td></tr>
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<tr class="memitem:ga97bfbab0a7705ba70ded1a0156b94bfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_HSI_VALUE</b>(VALUE)</td></tr>
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<tr class="memitem:ga054d518ead5cb52110393d3a6179f4e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_LSI_VALUE</b>(VALUE)</td></tr>
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<tr class="memitem:ga48b4f07a24cf145d753759a50bfaf016"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_LSI_STARTUP</b>(TIME)</td></tr>
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<tr class="memitem:ga287bbcafd73d07ec915c2f793301908a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_HSE</b>(HSE)</td></tr>
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<tr class="memitem:ga95d2678bf8f46e932e7cba75619a4d2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_LSE</b>(LSE)</td></tr>
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<tr class="memitem:gaae9d6172a72b0a90cb3703aa59258c57"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_SYSCLK_SOURCE</b>(SOURCE)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_AHBCLKDiv</b>(DIV)&#160;&#160;&#160;(((int32_t)DIV &gt; 0) &amp;&amp; (DIV &lt;= 510))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_APBCLKDiv</b>(DIV)&#160;&#160;&#160;(((int32_t)DIV &gt; 0) &amp;&amp; (DIV &lt;= 510))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_MCO_HCLkDiv</b>(DIV)&#160;&#160;&#160;(((int32_t)DIV &gt; 0) &amp;&amp; (DIV &lt;= 510))</td></tr>
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<tr class="memitem:gad7e8c994911e16d0f3840e2d03273f37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_MCO_SOURCE</b>(SOURCE)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_AHB_PERIPH</b>(PERIPH)&#160;&#160;&#160;((((PERIPH) &amp; RCC_AHBPeriph_ALL) != 0))</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_APB_PERIPH</b>(PERIPH)&#160;&#160;&#160;((((PERIPH) &amp; RCC_APBPeriph_ALL) != 0))</td></tr>
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<tr class="memitem:ga7e51de71183a43338c509bbca1adfeaa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_RESET_FLAG</b>(Flag)</td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga413f6422be11b1334abe60b3bff2e062"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga413f6422be11b1334abe60b3bff2e062">RCC_DeInit</a> (void)</td></tr>
<tr class="memdesc:ga413f6422be11b1334abe60b3bff2e062"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the RCC clock configuration to the default reset state.  <a href="group___r_c_c.html#ga413f6422be11b1334abe60b3bff2e062">More...</a><br /></td></tr>
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<tr class="memitem:gafbfc95016376b45e5bc49563576a50d6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#gafbfc95016376b45e5bc49563576a50d6">RCC_HSIConfig</a> (uint32_t HSI_Value, FunctionalState NewState)</td></tr>
<tr class="memdesc:gafbfc95016376b45e5bc49563576a50d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the Internal High Speed oscillator (HSI).  <a href="group___r_c_c.html#gafbfc95016376b45e5bc49563576a50d6">More...</a><br /></td></tr>
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<tr class="memitem:ga72d050ad0f27b15082d628ae0bfd6d1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga72d050ad0f27b15082d628ae0bfd6d1c">RCC_LSIConfig</a> (uint32_t LSI_Value, uint32_t LSI_StartUPTime, FunctionalState NewState)</td></tr>
<tr class="memdesc:ga72d050ad0f27b15082d628ae0bfd6d1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the Internal low Speed oscillator (LSI).  <a href="group___r_c_c.html#ga72d050ad0f27b15082d628ae0bfd6d1c">More...</a><br /></td></tr>
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<tr class="memitem:ga432b3281546d23345642d55f8670a93d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga432b3281546d23345642d55f8670a93d">RCC_HSEConfig</a> (uint32_t RCC_HSE)</td></tr>
<tr class="memdesc:ga432b3281546d23345642d55f8670a93d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the External High Speed oscillator (HSE).  <a href="group___r_c_c.html#ga432b3281546d23345642d55f8670a93d">More...</a><br /></td></tr>
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<tr class="memitem:ga8b2e5a38527f353eb72ac7038e56b0b0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga8b2e5a38527f353eb72ac7038e56b0b0">RCC_LSEConfig</a> (uint32_t RCC_LSE)</td></tr>
<tr class="memdesc:ga8b2e5a38527f353eb72ac7038e56b0b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the External Low Speed oscillator (LSE).  <a href="group___r_c_c.html#ga8b2e5a38527f353eb72ac7038e56b0b0">More...</a><br /></td></tr>
<tr class="separator:ga8b2e5a38527f353eb72ac7038e56b0b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37810b1a431965bb1914c18f87bb14a6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga37810b1a431965bb1914c18f87bb14a6">RCC_HSEDriveCurrentConfig</a> (uint32_t Current)</td></tr>
<tr class="memdesc:ga37810b1a431965bb1914c18f87bb14a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the drive current of High Speed oscillator (HSE).  <a href="group___r_c_c.html#ga37810b1a431965bb1914c18f87bb14a6">More...</a><br /></td></tr>
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<tr class="memitem:ga146a8f31f8468224f011202203ee0e1f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga146a8f31f8468224f011202203ee0e1f">RCC_HSEStartTimeConfig</a> (uint32_t Time)</td></tr>
<tr class="memdesc:ga146a8f31f8468224f011202203ee0e1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the start time of High Speed oscillator (HSE).  <a href="group___r_c_c.html#ga146a8f31f8468224f011202203ee0e1f">More...</a><br /></td></tr>
<tr class="separator:ga146a8f31f8468224f011202203ee0e1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab6645fbec94afa6645f6e81129ae6d0d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#gab6645fbec94afa6645f6e81129ae6d0d">RCC_LSEDriveCurrentConfig</a> (uint32_t Current)</td></tr>
<tr class="memdesc:gab6645fbec94afa6645f6e81129ae6d0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the drive current of Low Speed oscillator (LSE).  <a href="group___r_c_c.html#gab6645fbec94afa6645f6e81129ae6d0d">More...</a><br /></td></tr>
<tr class="separator:gab6645fbec94afa6645f6e81129ae6d0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga434c8b825d3089472e5676633712fa9c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga434c8b825d3089472e5676633712fa9c">RCC_LSEStartTimeConfig</a> (uint32_t Time)</td></tr>
<tr class="memdesc:ga434c8b825d3089472e5676633712fa9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the start time of Low Speed oscillator (LSE).  <a href="group___r_c_c.html#ga434c8b825d3089472e5676633712fa9c">More...</a><br /></td></tr>
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<tr class="memitem:ga3551a36a8f0a3dc96a74d6b939048337"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga3551a36a8f0a3dc96a74d6b939048337">RCC_SYSCLKConfig</a> (uint32_t RCC_SYSCLKSource)</td></tr>
<tr class="memdesc:ga3551a36a8f0a3dc96a74d6b939048337"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the SYS Clock (SYSCLK).  <a href="group___r_c_c.html#ga3551a36a8f0a3dc96a74d6b939048337">More...</a><br /></td></tr>
<tr class="separator:ga3551a36a8f0a3dc96a74d6b939048337"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa70ccc35b9bbc8efa9fc79576ebaa59a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#gaa70ccc35b9bbc8efa9fc79576ebaa59a">RCC_AHBCLKConfig</a> (uint32_t RCC_AHBCLKDiv)</td></tr>
<tr class="memdesc:gaa70ccc35b9bbc8efa9fc79576ebaa59a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the AHB clock (AHBCLK).  <a href="group___r_c_c.html#gaa70ccc35b9bbc8efa9fc79576ebaa59a">More...</a><br /></td></tr>
<tr class="separator:gaa70ccc35b9bbc8efa9fc79576ebaa59a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga72fbe926d274ee54bd687902985aa6a0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga72fbe926d274ee54bd687902985aa6a0">RCC_APBCLKConfig</a> (uint32_t RCC_APBCLKDiv)</td></tr>
<tr class="memdesc:ga72fbe926d274ee54bd687902985aa6a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the APB clock (APBCLK).  <a href="group___r_c_c.html#ga72fbe926d274ee54bd687902985aa6a0">More...</a><br /></td></tr>
<tr class="separator:ga72fbe926d274ee54bd687902985aa6a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c4ea72bdc2342b5ac01056f67b67ac5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga0c4ea72bdc2342b5ac01056f67b67ac5">RCC_MCOConfig</a> (uint32_t RCC_MCOSource, uint32_t RCC_MCOHCLKDiv)</td></tr>
<tr class="memdesc:ga0c4ea72bdc2342b5ac01056f67b67ac5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects the clock source to output on MCO pin.  <a href="group___r_c_c.html#ga0c4ea72bdc2342b5ac01056f67b67ac5">More...</a><br /></td></tr>
<tr class="separator:ga0c4ea72bdc2342b5ac01056f67b67ac5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b68c53f127e0382f58abab2f41c8cf4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga4b68c53f127e0382f58abab2f41c8cf4">RCC_MCOCmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga4b68c53f127e0382f58abab2f41c8cf4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or Disable the MCO Clock output.  <a href="group___r_c_c.html#ga4b68c53f127e0382f58abab2f41c8cf4">More...</a><br /></td></tr>
<tr class="separator:ga4b68c53f127e0382f58abab2f41c8cf4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e9944fd1ed734275222bbb3e3f29993"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga3e9944fd1ed734275222bbb3e3f29993">RCC_GetClocksFreq</a> (<a class="el" href="struct_r_c_c___clocks_type_def.html">RCC_ClocksTypeDef</a> *RCC_Clocks)</td></tr>
<tr class="memdesc:ga3e9944fd1ed734275222bbb3e3f29993"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the frequencies of different on chip clocks.  <a href="group___r_c_c.html#ga3e9944fd1ed734275222bbb3e3f29993">More...</a><br /></td></tr>
<tr class="separator:ga3e9944fd1ed734275222bbb3e3f29993"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0b30d8598b8393bdba9c3fefba3a968"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#gae0b30d8598b8393bdba9c3fefba3a968">RCC_AHBPeriphClockCmd</a> (uint32_t RCC_AHBPeriph, FunctionalState NewState)</td></tr>
<tr class="memdesc:gae0b30d8598b8393bdba9c3fefba3a968"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the AHB peripheral clock.  <a href="group___r_c_c.html#gae0b30d8598b8393bdba9c3fefba3a968">More...</a><br /></td></tr>
<tr class="separator:gae0b30d8598b8393bdba9c3fefba3a968"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6836629a78e13589ab7d318dcc98c79d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga6836629a78e13589ab7d318dcc98c79d">RCC_APBPeriphClockCmd</a> (uint32_t RCC_APBPeriph, FunctionalState NewState)</td></tr>
<tr class="memdesc:ga6836629a78e13589ab7d318dcc98c79d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the APB peripheral clock.  <a href="group___r_c_c.html#ga6836629a78e13589ab7d318dcc98c79d">More...</a><br /></td></tr>
<tr class="separator:ga6836629a78e13589ab7d318dcc98c79d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0d6761fbffe7e916c7aa043cabde180a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga0d6761fbffe7e916c7aa043cabde180a">RCC_AHBPeriphResetCmd</a> (uint32_t RCC_AHBPeriph, FunctionalState NewState)</td></tr>
<tr class="memdesc:ga0d6761fbffe7e916c7aa043cabde180a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Forces or releases AHB peripheral reset.  <a href="group___r_c_c.html#ga0d6761fbffe7e916c7aa043cabde180a">More...</a><br /></td></tr>
<tr class="separator:ga0d6761fbffe7e916c7aa043cabde180a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9949dce4756cc900075d20f9df8c90b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#gab9949dce4756cc900075d20f9df8c90b">RCC_APBPeriphResetCmd</a> (uint32_t RCC_APBPeriph, FunctionalState NewState)</td></tr>
<tr class="memdesc:gab9949dce4756cc900075d20f9df8c90b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Forces or releases APB peripheral reset.  <a href="group___r_c_c.html#gab9949dce4756cc900075d20f9df8c90b">More...</a><br /></td></tr>
<tr class="separator:gab9949dce4756cc900075d20f9df8c90b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61bb8115953f7876b421c2d921841a62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga61bb8115953f7876b421c2d921841a62">RCC_RTCPeriphResetCmd</a> (FunctionalState NewState)</td></tr>
<tr class="memdesc:ga61bb8115953f7876b421c2d921841a62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Forces or releases RTC peripheral reset.  <a href="group___r_c_c.html#ga61bb8115953f7876b421c2d921841a62">More...</a><br /></td></tr>
<tr class="separator:ga61bb8115953f7876b421c2d921841a62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8be8d5d022031e7f71d209f1705d47d0"><td class="memItemLeft" align="right" valign="top">FlagStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga8be8d5d022031e7f71d209f1705d47d0">RCC_GetResetFlagStatus</a> (uint32_t RCC_RSTFLAG)</td></tr>
<tr class="memdesc:ga8be8d5d022031e7f71d209f1705d47d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks whether the specified RCC reset flag is set or not.  <a href="group___r_c_c.html#ga8be8d5d022031e7f71d209f1705d47d0">More...</a><br /></td></tr>
<tr class="separator:ga8be8d5d022031e7f71d209f1705d47d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e5725d019edc4d0aa6c5e1d2dd0fe19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___r_c_c.html#ga0e5725d019edc4d0aa6c5e1d2dd0fe19">RCC_ClearResetFlags</a> (uint32_t RCC_RSTFLAG)</td></tr>
<tr class="memdesc:ga0e5725d019edc4d0aa6c5e1d2dd0fe19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the specified RCC reset flag.  <a href="group___r_c_c.html#ga0e5725d019edc4d0aa6c5e1d2dd0fe19">More...</a><br /></td></tr>
<tr class="separator:ga0e5725d019edc4d0aa6c5e1d2dd0fe19"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This file contains all the functions prototypes for the RCC firmware library. </p>
<dl class="section author"><dt>Author</dt><dd>WestberryTech Application Team </dd></dl>
<dl class="section version"><dt>Version</dt><dd>V0.0.3 </dd></dl>
<dl class="section date"><dt>Date</dt><dd>12-April-2023 </dd></dl>
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